University of Jordan

Computer Engineering Department

CPE 432: Computer Design

Spring 2008

 

Instructor Dr. Gheith Abandah
Email abandah@ju.edu.jo
Home page http://www.abandah.com/gheith
Office Computer Engineering 405
Office hours
bulletSun 10:00 - 11:00
bulletMon and Wed 10:00 - 11:00
bulletThu 11:00 - 12:00
No. of credit hrs 3
Prerequisites CPE 232: Computer Organization
Time and room
bulletSection 1: Mon and Wed 8:00-9:30, CPE 001
Textbook Hennessy and Patterson. Computer Architecture: A Quantitative Approach, 4th ed., Morgan Kaufmann, 2007.
References
  1. Patterson and Hennessy. Computer Organization & Design: The Hardware/Software Interface, 3rd ed., Morgan Kaufmann, 2005.

  2. D. Culler and J.P. Singh with A. Gupta. Parallel Computer Architecture: A Hardware/Software Approach, Morgan Kaufmann, 1998.

  3. J. Hayes. Computer Architecture and Organization, 3rd ed., McGraw-Hill, 1998.

Grading
Mid-Term Exam 30%
3 Homeworks and 2 Quizzes: 3 Marks for each homework, and 11 marks for the 2 quizzes. 20%
Final Exam 50%
Policies
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Attendance is required.

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All submitted work must be yours.

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Cheating will not be tolerated.

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Homeworks are due on exam or quiz dates

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This course requires significant effort.

Tentative outline
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Introduction

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Instruction Set Principles

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Review of Pipelining

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Instruction-Level Parallelism and Its Exploitation

Midterm Exam

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Limits of Instruction-Level Parallelism

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Multiprocessors and Thread-Level Parallelism

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Memory Hierarchy Design

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Storage Systems

Final Exam

Special Dates
Sun 10 Feb 2008 Classes Begin
Wed 27 Feb 2008 Homework 1 Announcement
Wed 5 Mar 2008 Quiz 1 and Homework 1 Due
Wed 26 Mar 2008 Homework 2 Announcement
Wed 2 Apr 2008 Midterm Exam and Homework 2 Due
Mon 28 Apr 2008 Homework 3 Announcement
Mon 5 May 2008 Quiz 2 and Homework 3 Due
Tue 27 May 2008 Last Lecture
Sat 31 May 2008 Final Exam
Handouts

Slides

  1. Introduction and Technology Trends
  2. Quantitative Principles of Computer Design
  3. Instruction Set Principles
  4. Review of Pipelining
  5. Instruction Level Parallelism - Part I
  6. ILP II: Branch Prediction
  7. ILP III: Dynamic Scheduling
  8. ILP IV: Speculative Execution
  9. ILP V: Multiple Issue
  10. Limits to ILP
  11. Thread Level Parallelism
  12. Multiprocessor Introduction
  13. Snooping Cache Multiprocessors
  14. Directory-Based Multiprocessors
  15. Memory Hierarchy Review
  16. Advanced Memory Hierarchy
  17. Storage

Homeworks

  1. Homework 1: Due Wed 12 Mar, 2008, Solution
  2. Homework 2: Due Wed 2 Apr, 2008, Solution
  3. Homework 3: Due Mon 5 May, 2008, Solution.

Quizzes and Exams

  1. Solution of Quiz 1 given on Mar 12, 2008.
  2. Solution of the midterm exam giving on April 2, 2008.
  3. Solution of Quiz 2 given on May 5, 2008.

Grades