University of Jordan

Computer Engineering Department

CPE 432

Computer Design

Spring 2004

 

Instructor Dr. Gheith Abandah
Email abandah@ju.edu.jo
Home page http://www.abandah.com/gheith
Office Computer Engineering 406
Office hours
bulletTuesday 10:00-11:00
bulletWednesday 15:00-16:00
bulletThursday 19:00-20:00
No. of credit hrs 3
Prerequisites CPE 232
Time and room
bulletSection 1: Sun, Tue, and Thu 8:00-9:00, CE 103
bulletSection 2: Sun, Tue, and Thu 9:00-10:00, CE 102
bulletSection 3: Sun, Tue, and Thu 18:00-19:00, EE 101
Textbook Hennessy and Patterson. Computer Architecture: A Quantitative Approach, 3rd ed., Morgan Kaufmann, 2002.
References

  1. Patterson and Hennessy. Computer Organization & Design: The Hardware/Software Interface, 2nd ed., Morgan Kaufmann, 1997.

  2. D. Culler and J.P. Singh with A. Gupta. Parallel Computer Architecture: A Hardware/Software Approach, Morgan Kaufmann, 1998.

  3. J. Hayes. Computer Architecture and Organization, 3rd ed., McGraw-Hill, 1998.
Grading
First Exam 25%
Second Exam 25%
Final Exam 50%
Tentative outline
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Introduction

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Instruction Set Principles

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Instruction-Level Parallelism and Its Dynamic Exploitation

First exam

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Exploiting Instruction-Level Parallelism with Software Approaches

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Memory Hierarchy Design

Second exam

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Multiprocessors and Thread-Level Parallelism

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Storage Systems

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Interconnection Networks and Clusters

Final exam

Handouts: