Instructor |
Dr.
Gheith Abandah |
|
Email |
abandah@ju.edu.jo |
|
Homepage |
http://www.abandah.com/gheith/Courses/CPE335_S08 |
Office |
Computer
Engineering
405 |
|
Office
Hours |
| Sun 10:00 - 11:00 |
| Mon and Wed 10:00 - 11:00 |
| Thu 11:00 - 12:00 |
|
|
Prerequisites |
CPE 231: Digital Logic |
Time
and Room |
| Section 1: Sun, Tue, and Thu 8:00-9:000,
Middle Auditorium (Dr. Elmousa) |
| Section 2: Sun, Tue, and Thu 10:00-11:00,
CPE 001
(Dr. Rabadi) |
| Section 3: Mon and Wed 8:00-8:30,
CE 002
(Dr. Elmousa) |
| Section 4: Mon and Wed 11:00-12:30,
CPE 001 (Dr. Abandah) |
|
Textbook |
Patterson and Hennessy. Computer Organization &
Design: The Hardware/Software Interface, 3rd ed., Morgan Kaufmann,
2005. |
References |
-
Hennessy and Patterson. Computer Architecture: A
Quantitative Approach, 3rd ed., Morgan Kaufmann, 2002.
-
J. Hayes.
Computer Architecture and Organization, 3rd ed., McGraw-Hill, 1998.
-
M.
Mano. Computer System Architecture, 3rd ed., Prentice Hall, 1993.
|
Grading |
Midterm Exam |
30% |
3
Homeworks and 2 Quizzes: 3 Marks for each homework, and 11 marks for
the 2 quizzes. |
20% |
Final Exam |
50% |
|
|
Policies |
|
Attendance is required. |
|
All
submitted work must be yours. |
|
Cheating
will not be tolerated. |
|
Homeworks
are due on exam or quiz dates |
|
This
course requires significant effort. |
|
Tentative
Outline |
|
Introduction |
|
MIPS
Instruction Set |
|
Computer Arithmetic |
|
CPU
Performance |
Midterm Exam
|
Datapath Design |
|
Control Design |
|
Pipelining |
|
Memory
Hierarchy |
Final
Exam
|
|
|