Instructor |
Dr.
Gheith Abandah |
|
Email |
abandah@ju.edu.jo |
|
Homepage |
http://www.abandah.com/gheith/Courses/CPE232_S07 |
Office |
Computer
Engineering
405 |
|
Office
Hours |
![bullet](../../_themes/blends/blebul1a.gif) | Mon 9:30-10:30 |
![bullet](../../_themes/blends/blebul1a.gif) | Tue 12:00 - 13:00 |
![bullet](../../_themes/blends/blebul1a.gif) | Thu 9:00 - 10:00 |
|
|
Prerequisites |
CPE 231: Digital Logic |
Time
and Room |
![bullet](../../_themes/blends/blebul1a.gif) | Section 1: Mon and Wed 8:00-9:300,
CPE 001 |
![bullet](../../_themes/blends/blebul1a.gif) | Section 2: Sun, Tue, and Thu 11:00-12:00,
CE 002 |
![bullet](../../_themes/blends/blebul1a.gif) | Section 3: Sun, Tue, and Thu 9:00-10:00,
CPE 001 |
|
Textbook |
Patterson and Hennessy. Computer Organization &
Design: The Hardware/Software Interface, 3rd ed., Morgan Kaufmann,
2005. |
References |
-
Hennessy and Patterson. Computer Architecture: A
Quantitative Approach, 3rd ed., Morgan Kaufmann, 2002.
-
J. Hayes.
Computer Architecture and Organization, 3rd ed., McGraw-Hill, 1998.
-
M.
Mano. Computer System Architecture, 3rd ed., Prentice Hall, 1993.
|
Grading |
Midterm Exam |
30% |
Quizzes (Best 4 out of 5) |
20% |
Final Exam |
50% |
|
|
Policies |
![bullet](../../_themes/blends/blebul1a.gif) |
Attendance is required. |
![bullet](../../_themes/blends/blebul1a.gif) |
There is no credit for homeworks. However, quizzes are
expected at the homeworks' due dates. |
![bullet](../../_themes/blends/blebul1a.gif) |
All
submitted work must be yours. |
![bullet](../../_themes/blends/blebul1a.gif) |
Cheating
will not be tolerated. |
![bullet](../../_themes/blends/blebul1a.gif) |
This
course requires significant effort. |
|
Tentative
Outline |
![bullet](../../_themes/blends/blebul1a.gif) |
Introduction |
![bullet](../../_themes/blends/blebul1a.gif) |
MIPS
Instruction Set |
![bullet](../../_themes/blends/blebul1a.gif) |
Computer Arithmetic |
![bullet](../../_themes/blends/blebul1a.gif) |
CPU
Performance |
Midterm Exam
![bullet](../../_themes/blends/blebul1a.gif) |
Datapath Design |
![bullet](../../_themes/blends/blebul1a.gif) |
Control Design |
![bullet](../../_themes/blends/blebul1a.gif) |
Pipelining |
![bullet](../../_themes/blends/blebul1a.gif) |
Memory
Hierarchy |
Final
Exam
|
|
|